A 250-Mb/s Direct Phase Modulator With −42.4-dB EVM Based on a 14-GHz Digital PLL

This letter presents a 14-GHz digital-intensive phase modulator circuit, which is able to enforce an arbitrary carrier phase change in one sample of a 200-MHz clock. The architecture is based on a fractional-N bang-bang digital PLL exploiting an adaptive DCO-tuning requantizer, which mitigates the segmentation-induced nonlinearity of the DCO, and a novel deskewing circuit, which improves the EVM at high bit rates. The modulation error, expressed in terms of RMS value of the EVM, is below -42 dB for a 250-Mb/s 32-PSK modulated carrier. The phase modulator, integrated in a 28-nm CMOS process, consumes 31.5-mW power, achieving 0.13-nJ/bit energy consumption.