Turbo codes on the fixed point DSP TMS320C55x

Turbo codes are introduced in 3rd generation wireless cellular standards for their superior coding gain. The MIPS requirements of turbo codes are however extremely high. This paper describes the implementation of a turbo-decoding algorithm on the TMS320C55x processor. The coding performance is evaluated with fixed-point arithmetic. A method to optimize the memory is also introduced to address the large data storage problem. The effect of finite word lengths is carefully examined to reduce the state metric normalization time and to achieve at the same time an acceptable bit error rate (BER). The coding gain of 5.8 dB for a BER of 10/sup -3/ in 6 iterations is achieved with a frame size of 1 K bits and 50 Hz frame rate. Total MIPS estimate when using the max Log-MAP algorithm is 46 MIPS.