A comparative analysis for low power motion estimation VLSI architectures

The power consumption is very critical for portable video applications. The largest portion of power is consumed in the motion estimation module, as it requires a huge amount of computations. This paper compares different full-search motion estimation architectures targeted for low power consumption. Each of the architectures is analyzed, and then compared to the others. An architectural enhancement to further reduce the power consumption is proposed. Our approach is based on further elimination of useless computations without scarifying throughput or optimality. Different benchmarks are used to test and compare the discussed architectures. Analytical and simulation results show the effectiveness of the enhancement.