A cost-based heuristic for statistically determining sampling frequency in a wafer fab

In wafer fabrication, because of the long cycle time, the high yield uncertainty and the high manufacturing cost, earlier process monitoring and control are critical. Thus, a number of inspection and measurement stations are set in the fabrication process to assure that the wafer quality meets the specific requirements. Researchers have applied the acceptance sampling plan to determine whether a lot is accepted or not. Due to the limited capacities and costs for in-line wafer inspections, only certain wafers are inspected among a specific number of lots. Thus, it is important to determine the sampling strategy that minimizes the total expected costs, including the inspection costs, false-alarm costs, out-of-control costs, in-control costs, and the costs from the false-passed wafers. In this study, we developed a cost-based heuristic for statistically determining the sampling frequency in wafer fab based on the economics, control chart design, Bayesian decision analysis, and the acceptance sampling strategy. We aimed to determine the optimal sampling frequency that trades off the various risks (i.e. the aggregation of cost and probability).