ADeLe: Rapid Architectural Simulation for Approximate Hardware

Recent research has introduced approximate hardware units that produce incorrect outputs deterministically or probabilistically for some small subset of inputs but allow significantly higher throughput or lower power than their errorfree counterparts. The integration, validation, and evaluation of these approximate units in architectures and processors, however, remains challenging. In this paper, we introduce ADeLe, a high-level language for the description, configuration, and integration of approximate hardware units into processors. ADeLe reduces the design effort for approximate hardware by modeling approximations at a high level of abstraction and automatically injecting them into a processor model for architectural simulation. Approximations in ADeLe may modify or completely replace the functional behavior of instructions according to user-defined policies. Instructions may be approximated deterministically or probabilistically (e.g., based on operating voltage and frequency). To allow for controlled testing, approximations may be enabled and disabled from software. Energy is automatically accounted based on customizable models that consider the potential power savings of the approximations that are enabled in the system. ADeLe provides designers with a generic and flexible verification framework, allowing them to easily evaluate the energy-quality trade-offs of their designs in applications. We demonstrate the language and corresponding framework by introducing different approximation techniques into a processor model, on top of which we run selected applications. We demonstrate ADeLe using 6 approximate designs with 4 image processing and 2 floating point applications. Our experiments show how ADeLe may be used to generate approximate CPUs and to evaluate energy-quality trade-offs for different applications with reduced effort.