Two-step quantization architectures for multibit /spl Delta//spl Sigma/-modulators

The implementation of the internal A/D-converter in a /spl Delta//spl Sigma/-modulator can be simplified by utilizing two-step quantization, which makes the internal quantization feasible with much higher resolution than with conventional solutions. The A/D-conversion is divided into two time steps which significantly reduces the circuit complexity when compared to flash type conversion. The loop stability is sustained by feeding back a coarse result obtained during the first time step. The second step yielding a finer resolution is interleaved with the next sample so that the resolution improvement is achieved without sacrificing the speed. It is shown, with a linearized model, that the order of the noise shaping is increased by one with respect to the coarse quantization error made during the first step. For a high oversampling ratio the coarse quantization error made in the first step is easily suppressed to an insignificant level due to the one order higher noise shaping. Depending on the partitioning of the bits between the conversion steps the coarse error will dominate below a certain oversampling ratio. However, it is shown that the technique can be extended to more than one order higher noise shaping making it usefull for low oversampling ratios as well.