A VLSI architecture for hybrid object-based video motion estimation

This paper presents a VLSI architecture that can be used for video object motion estimation. The architecture generates a 2D hierarchical mesh that represents the dynamics of the video object, and it uses a block matching core to generate the motion vectors of the mesh nodes. The architecture uses parallel block matching motion estimation to optimize the latency. Moreover, using the three steps motion estimation algorithm simplifies the motion estimation of the mesh nodes. The architecture has been prototyped and its performance measures have been evaluated. This processor can be used in online object-based video applications such as in MPEG-4, and VRML.