A 102-dB spurious-free DR /spl Sigma//spl Delta/ ADC using a dynamic dither scheme

A sigma-delta analog-to-digital converter (ADC) using dynamic dither to achieve a tone-free dynamic range of 102 dB in an audio bandwidth is presented. The design was implemented using a third-order 2:1 cascade architecture with an oversampling ratio of 128. The ADC modulator consumes 22 mW from a 3.0 V power supply, and was fabricated in 0.6-/spl mu/m CMOS (analog portion) and 0.3-/spl mu/m CMOS (digital portion) using multichip-module technology.