An Optimized Implementation of a Two-Sample Phase Locked Loop with Frequency Feedback for Single-Phase Sensorless Bridgeless PFC

A new optimized implementation of the recently proposed Two-Sample (2S) Phase Locked Loop, PLL, with Frequency Feedback (FFB) for single-phase Bridgeless Power Factor Correction (PFC) is proposed. The digital resources are reduced using an oscillator, which replaces trigonometric functions, and eliminating the division operation. Finally, the PLL, working in a digitally controlled current sensorless Bridgeless PFC, is evaluated by simulation and experimentally.