Research on Failure Mechanism of Chip Welding Voids for Power Semiconductor Devices

The chip solder layer of power semiconductor devices carries the mechanical, thermal and electrical loads in the working state of devices. With the increase of packaging density and power density, the reliability requirement of solder layer is increased. Because the solder layer area of power module is much larger than that of traditional solder, its failure mode and mechanism have certain uniqueness, and it is urgent to study deeply. Through the failure analysis case study, this paper expounds the mechanism and the influence factors for the formation of the voids. The detection and verification test methods of voids defect is also introduced.