Implementation and Analysis of Spin-Torque-Based Reversible D-Latch

Quantum computing due to its ability of inherent parallel processing is emerged as one of the solutions to the complex computing problems. In connection with this, several proposals have been given for the quantum circuits-based design of the reversible combinational and sequential circuits. However, the implementation of the reversible sequential logic is challenging in comparison to the reversible combinational logic. Spin-torque-based reconfigurable architecture could be utilized to realize the quantum circuits. However, the architecture needs the optimized decomposition of the quantum circuits utilized for the reversible sequential logic due to required number of single qubit rotations and two-qubit entanglements. In this paper, the elementary decomposition of the quantum circuits representing the reversible D-Latch is optimized with the help of elementary quantum library
$\{R_{\mathrm{y}}(\theta),\ R_{\mathrm{z}}(\theta),\ \sqrt{\text{SWAP}}\}$
. The number of elementary operations required to realize the D-Latch over 5 clock cycles is reduced by 43.56%. The average fidelity of the D-Latch considered for the implementation and analysis is obtained at the end of each clock cycle is well above 97%. The fidelity is further improved by approximating the present state output utilized for the next state input.