Relative indexed compressed sparse filter encoding format for hardware-oriented acceleration of deep convolutional neural networks

To address memory and computation resource limitations for hardware-oriented acceleration of deep convolutional neural networks (CNNs), we present a computation flow, stacked filters stationary flow (SFS), and a corresponding data encoding format, relative indexed compressed sparse filter format (CSF), to make the best of data sparsity, and simplify data handling at execution time. And we also propose a three dimensional Single Instruction Multiple Data (3D-SIMD) processor architecture to illustrate how to accelerate deep CNNs by taking advantage of the SFS flow and CSF format. Comparing with the state-of-the-art result [1], our methods achieve 1.11 x improvement in reducing the storage required by AlexNet, and 1.09 x improvement in reducing the storage required by SqueezeNet, without loss of accuracy on the ImageNet dataset. Moreover, using these approaches, chip area for logics handling irregular sparse data access can be saved (about 19.1% chip area in [2]). Comparing with the 2D-SIMD processor structures in DVAS, ENVISION, etc., our methods achieve about 3.65x processing element (PE) array utilization rate improvement (from 26.4% to 96.5%) on the data from Deep Compression on AlexNet
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