Real-time high-throughput sonar beamforming kernels using native signal processing and memory latency hiding techniques

We evaluate the use of native signal processing with loop unrolling and software prefetching to achieve high-performance digital signal processing on general-purpose processors. We apply these techniques to minimize the number of processors necessary for real-time implementation of a 3-D sonar beamformer. Because our beamforming kernels operate on high-throughput (/spl sim/100 Mb/s) input/output streams, memory latency hiding techniques are key for maximum performance. On the Sun UltraSPARC-II processor, we find speedups of 2.4 for hand loop unrolling, 1.46 for the visual instruction set over floating-point arithmetic in C, and 1.33 for software prefetching.