A Systematic Design Methodology for Class-AB-Style Ring Amplifiers

This brief introduces a design approach for Class-AB-style ring amplifiers which differs from the design of conventional amplifiers. The theory of operation of Class-AB-style ring amplifier is discussed as well as the different design tradeoffs that affect its design. Consequently, a systematic design methodology for Class-AB-style ring amplifier is introduced. A design example of a switched-capacitor gain amplifier with a closed-loop gain of 32, using a three-stage self-biased ring amplifier, is presented. This example has been designed and implemented in UMC 130-nm CMOS technology. It achieves an spurious-free dynamic range of 72 dB with a clock frequency of 25 MHz. It operates from a single 1.2-V supply and consumes 400 μA.