Hardening C-elements against metastability

C-elements are non-standard sequential logic gates employed in the design of e.g. asynchronous circuits, clock generators and radiation-hardened circuits. Like any other bistable component as flip-flops and latches, C-elements are susceptible to the metastability phenomenon if marginal triggering conditions are satisfied. However, unlike flip-flops and latches, little research has specifically addressed C-elements metastability issues in the past. This work proposes for the first time an investigation of the susceptibility to metastability of four distinct C-element circuit architectures. Three of these are classical topologies and the last is one recently proposed. The paper also suggests optimizations to enhance the robustness to metastability of the studied structures, showing the effects of these changes in the mean time between failures (MTBF), considering implementations in a 65 nm technology. Results show improvements in τ ranging from around two to four times, when comparing baseline C-elements to their hardened versions.