Vertically stacked gate-all-around Si nanowire transistors: Key Process Optimizations and Ring Oscillator Demonstration

We report on CMOS-integrated vertically stacked gate-all-around (GAA) Si nanowire (NW) MOSFETs with in-situ doped source-drain stressors and dual work function metal gates. We demonstrate that oxidation-induced SiGe/Si fin deformation by STI densification is effectively suppressed by a SiN liner. This SiN fin protection improves the controllability of nanowire formation. In addition, highly-selective Si nano-wire release and inner spacer cavity formation without Si re-flow are demonstrated. Finally, for the first time we report functional ring oscillators based on stacked Si NW-FETs.