Extraction of Process Variation Parameters in FinFET Technology Based on Compact Modeling and Characterization

A parameter extraction methodology of statistical process variations in FinFET is presented in this paper. First, the main impacts of various variation sources are decomposed, with detailed discussion on the correlation between threshold voltage and subthreshold swing. Second, following the Fin-edge roughness (FER) and gate-edge roughness (GER) compact models, the physical parameters, autocorrelation length and amplitude of root mean square of FER and GER, are extracted based on our proposed extraction procedure. Given a set of I-V (whether from TCAD or measured silicon data), this method can simply extract the process variation parameters from several experimental sets, such as experiments under different device geometries and/or bias conditions. With the extracted parameters integrated into compact models, the figure of merits of simulation program with integrated circuit emphasis results are well consistent with experimental measurements. The proposed methodology is not only helpful for model-based design-technology co-optimization, but also helpful for variation-aware circuit design.