Impact of structural geometry on quantum capacitance and threshold voltage of surrounding gate junction less nanowire field effect transistor

The Surrounding Gate(SG) Junction Less Nanowire Transistor (JLNT) structures are gaining considerable attention in present times due to the availability of better control over electrostatic and transport behaviors of the device. These structures may have different geometry with rectangular or circular cross sections. Depending on the cross sections, the device may have a rectangular box structure or a cylinder structure. A comparison of Capacitance-Voltage (C-V) characteristics and threshold voltage variation between these two different SG geometry of JLNT, namely, Rectangular Gate (RG-JLNT) and Cylindrical Gate (CG-JLNT) structures has been done. Self-consistent solver that takes wave function penetration and other Quantum Mechanical (QM) effects into account has been developed here to evaluate the C-V characteristic which were used to find threshold voltage. The variation in C-V characteristics and threshold voltage with change in device parameters for the two structures of JLNT has been studied. The results demonstrate that, between the two structures, CG-JLNT is the better performer in terms of handling channel potential and Short Channel Effects (SCEs) as scaling down is done.