Design and analysis four bit hybrid full adder cell using gate diffusion input technique and domino logic

In this paper, four-bit hybrid full cell has been proposed which is basically consist of two techniques that is Gate Diffusion Input Technique and Domino Logic. Domino Logic is standard logic which is quiet better than Static Logic. In domino logic, by utilizing the evaluation phase as well as the pre-charge phase, it is used to increase the speed of the circuit. It is also used for the low power consumption as well as the low leakage current in the circuit. For the low power design this hybrid combination of Gate Diffusion Input Technique and Domino Logic is used. In this paper, CADENCE VIRTUOSO tool is being used and all the simulation work is done on it by utilizing the technology node at 180nm along with the supply voltage of 1.8V. The simulation result represents that the proposed 4-bit full adder cell absorbs 96.84% less power as compare with the Standard Domino Logic [5], 82% less power as compare with the Dynamic Body Bias Generator [5] and 22.38% less power as compare with the MTCMOS domino logic [6]. As we know that power and propagation delay both are varying inversely proportional but still the propagation delay is not much affected and the delay in proposed architecture design is almost similar than the existing designs.