Program/erase speed and data retention trade-off in negative capacitance versatile memory

In this work, we investigated the performance tradeoff between program/erase speed and data retention of ferroelectric HfZrO memory. The monoclinic HfNO layer with a trapping mechanism was employed to improve the data retention. Under the thickness optimization of HfNO, the HfZrO/HfNO gate stack can be functionalized with volatile and non-volatile operation.