A novel thyristor-based SRAM cell (T-RAM) for high-speed, low-voltage, giga-scale memories

T-RAM is a novel high-density SRAM cell based on a vertical surrounding-gate thyristor with a novel gate-assisted switching mechanism. In this paper, the first experimental integration of the vertical surrounding-gate thyristors and planar NMOS-FETs to make T-RAM cells is reported. Our measurements on various device geometries confirm a standby current below 10 pA for T-RAM in a 0.5 /spl mu/m or smaller technology and a speed of 5 ns. It is also shown that the performance of a T-RAM cell improves with the down-scaling of the thickness of the thyristors. The thermal stability of a T-RAM cell is also investigated.