A high density high performance 180 nm generation Etox/sup TM/ flash memory technology

A 180 nm-generation flash memory technology has been developed, optimized for small cell size, high performance low voltage operation and multi-level-cell and embedded logic capability. Memory cell scaling utilizes scaled trench isolation, self-aligned floating gates, cobalt salicided complementary poly gates, unlanded contacts and traditional dielectric and junction scaling. Low voltage performance is achieved with the inclusion of logic compatible NMOS and PMOS transistors, a triple well and 3 layers of metal interconnect. 16 Mbit flash memories with 0.38 /spl mu/m/sup 2/ cell size have been built on this technology as a yield and reliability test vehicle.