Low power VLSI transposed structure FIR filter using shift/add architecture

This paper presents the implementation of the novel FIR filter with the filter architecture using shift and add multiplier. The designed is compared to the previous novel FIR designs such as Direct form and previous shift add architecture in Direct form and Transposed form. The design is done on the Transposed structure form of FIR as it is desirable in low power applications. The filters are optimized for low power but other trade-offs can still be found. The design was found to be improved in low power. The novel FIR filter is described using the in-built multipliers and adders of Vivado Design Suite 2015.2 and implemented on the device xc7a100tcsg324-1. Static power of the device was found higher in the frequency of 100 MHz.