Diffused bit generator model for trng application at CMOS 45nm technology

True Random Number Generator (TRNG) occupies a commendable position in various information security applications. Random numbers are the one which need to possess the properties of uniform distribution and statically independent. Diffused bit Generator (DBG) is a reliable entropy source and core component to produce the sequence of random bits. The bits emanating from DBG is usually further sampled for n-bit random number generation. In this work, an ASIC implementation of a DBG unit constructed with the integration of LFSR (Linear Feedback Shift Register) and CA (Cellular Automata) has been proposed. This model is designed and simulated using cadence virtuoso tool with 45 nm technology. To validate the design, Transient, AC and DC analyses have been performed.