A high-speed fully differential current switch

A high-speed fully differential current switch is presented. The clock-feedthrough effect is reduced by Swing-Reduced Drivers (SRDs) and neutralized by dummy transistors. With the use of SRDs, less charges are required to be transferred to/from the gates of the switching transistors, and hence, the switching speed can be increased without significant output error. The SRDs also reduce the possible large current spikes on the outputs of the current switch. Analysis shows this current switch is ideal for high-speed current-mode signal processing. A continuous-time switched-current /spl Sigma//spl Delta/ modulator using these current switches has been implemented in a 2 /spl mu/m CMOS process and achieved a 50 dB dynamic range with a 50 MHz clock.