An Electrostatic Discharge Protection Circuit Technique for the Mitigation of Single-Event Transients in SiGe BiCMOS Technology

The impact of electrostatic discharge (ESD) protection circuits on the single-event transients (SETs) of RF building blocks in a 130-nm SiGe BiCMOS (8HP) platform is investigated. For proof-of-concept that SET mitigation can be accomplished through the use of an ESD protection circuit, a single-pole single-throw (SPST) switch was implemented using triple-well nFETs. For substrate noise coupling suppression, a P
⁺
, P
^-
substrate (Psub) and N-well guard ring structures were applied. According to two-photon absorption laser experiment results, the SPST switch with ESD protection exhibits the smallest transient peaks at the RF input/output and VDD ESD terminals. Based on these results, an SET mitigation strategy is proposed while maintaining the optimal circuit performance.