Design and analysis of tunnel FET using high K dielectric materials

In this Paper, design and analysis of dielectric based Tunnel FET and the performance is analysed by using various High k dielectric materials. In this design Ultra Thin dielectric is used to increase the drive current of the Tunnel FET. The I
on
/I
off
ratio is observed as 0.5×10
⁷
. The main advantage of Tunnel FET is low OFF current which is achieved as 5.25×10
¹⁶
A/ßm. The ambipolarity is reduced. The Subthreshold Slope is achieved as 59mV/dec. The performance of the device is analysed by the 2D TCAD Sentaurus Simulations. The Tunnel FET is used only for Ultra low power applications.