A wideband square-law power detector with high dynamic range and combined logarithmic amplifier for 100 GHz F-Band in 130 nm SiGe BiCMOS

This work presents an active wideband power detector, operating between 90 GHz and 140 GHz. The topology is a low-biased bipolar cascode with a diode-connected pMOS transistor as non-linear load for extending the quadratic characteristic. To realize a linear-in-db behavior a low-power logarithmic amplifier with offset compensation is directly coupled to the power detector. The circuit is implemented in 130 nm SiGe BiCMOS. The achieved dynamic range of the square-law region is 38 dB, with a total dynamic range of 48 dB and a minimum input level of below −50 dBm. The static power consumption of the detector and logarithmic amplifier is 68 μW and 400 μW.