Hybrid history-based test, utilizing a probabilistic approach to reduce test time

This paper presents a hybrid history-based test generation mechanism that intermittently applies partial-test vectors to reduce test application time. Test generation is done by looking into the results of the circuit under test that are used later as a part of partial-test vectors. Therefore, these test vectors convey a history of previously applied tests. A probability based analysis is also proposed to be used in both fault ranking and scan cell re-ordering. The first one improves test quality and hence reduces the number of required test vectors, while the second one compensates the loss of controllability and observability of the circuit due to the added partial shifting technique. Experimental results show more than 50% improvement in test application time on ISCAS'89 and ITC'99 benchmarks while maintaining full coverage fault detection.