An investigation of FinFET based digital circuits for low power applications

This paper presents a design methodology of flip-flops for low power applications using FinFET. It presents an investigation of the basic characteristics of p-FinFETs and n-FinFETs in various configurations. An Inverter, the simplest digital circuit is implemented and extensively studied to understand the concepts of sizing and optimal choice of the configurations. Multiplexer based approach for implementing the flip-flop has been chosen for demonstration. The Predictive Technology Model (PTM) FinFET 32nm library has been used on HSPICE for implementing the designs. The designed flip-flops operates with 0.9V and consumes a power of 11.4 μW.