Memristor based modulo multiplier design for (2n−1) and 2n radix

Memristor based modulo multipliers for radix (2
ⁿ
− 1) and 2
ⁿ
have been reported in this paper. Memristor technology is an emerging field in the processor design technology. Here the functional components of the proposed multiplier structures such as partial products, adder etc. have been designed using IMPLY gate which is the first building block implemented using memristor. In memristive logic family, each memristor acts as an input, output, computational logic element in computation process. The main contribution of this paper is to show the design methodologies for modulo multiplication for (2
ⁿ
− 1) and 2
ⁿ
radix and then the techniques has been implemented using memristor. The modulo multiplication schemes, which have been presented here, have generic structures for n bit with radix (2
ⁿ
− 1) and 2
ⁿ
. We have calculated the memristor count to estimate the latency of the design.