Analysis of an abnormal ESD failure due to negative (positive) voltage surge on gate oxide during HBM testing

The large difference between TLP (Transmission Line Pulse) and HBM (Human Body Model) test results of a power NMOS have been analysed using experimental tests as well as physical FA (Failure Analysis). A phenomenological explanation has been provided to account for the negative (positive) voltage surge that occurs during HBM positive (negative) zap on drain due to inductance of the bonding wire. Finally, a shunt diode design solution is proposed to absorb the voltage surge.