A time multiplexed network architecture for large-scale neuromorphic computing

Emerging trend in neuromorphic implementation moves towards large-scale neuron array that processes large amount of input data. It presents a grand challenge in communication between neurons due to large number of connections, or synapses, which can be in the order of millions, leading to large power consumption, processing time and many physical wires. In this work, we propose a communication protocol based on a time-division multiplexing method using just a single wire to minimize the cost of interconnect and processing time. Both analytical and numerical results show that, compared to the commonly used address even representation approach, the proposed technique leads to 40% lower energy consumption in interconnect, for a network of 1,024 neurons with a toggling factor of ∼ 40%. The energy saving will further increase for even larger neural network and/or higher toggling factor. In an image classification experiment using MNIST dataset, the average processing time is reduced more than four times via the proposed scheme given a network size of 1024 neurons.