2nd-Order VCO-based CT ΔΣ ADC architecture

This paper proposes a novel architecture for purely voltage controlled oscillator (VCO) based continuous-time (CT) second-order ΔΣ analog-to-digital converter (ADC) without using bulky, passive components. The proposed technique does not require any VCO nonlinearity calibration and is robust against excess loop delay and static and dynamic errors in the multi-element digital-to-analog converter (DAC). Behavioral simulations have been performed to validate the proposed architecture.