Microstrip channel behavioral model for integrated circuits and electronic systems design

Present and future link (SerDes) design requires a strong and effective coupling between high-speed circuit design, optimization, and digital communications, its problems are different that new solutions are required. This paper proposed an analytical wireline channel model for path loss prediction for effective electronic circuits and systems design. Proposed model closely match experimental data and electromagnetic full-wave simulation data. This model is recommended for electronic circuits and systems engineers, for adequate and faster interfaces (SerDes-Serializer/Deserializer) or high-speed links designs.