A bumping process for 12" wafers

Flip chip (FC) technology is a driving force to achieve increased speed and performance along with higher I/O counts due to its high level of importance for a variety of applications. A breakthrough, however, will be the use of flip chip due to cost reduction. For this aim, it is essential to use low cost bumping techniques. This paper shows a low cost wafer level bumping process based on a electroless nickel/gold under bump metallization (UBM) for all flip chip interconnection technologies, such as flip chip on board or flip chip in package which are used in industry at present. The compatibility of electroless nickel bumping for implementation in wafer manufacturing in the next millennium shows that this is a key technology, not only for wafer technologies in use at present, but especially for the next generation wafer technologies which include 300 mm wafers and copper pads. A state of the art overview, and a roadmap to future developments in the semiconductor industry based on 300 mm wafers is shown.