A 54.4–90 GHz Low-Noise Amplifier in 65-nm CMOS

This paper proposes a transformer-based broadband low-noise amplifier (LNA) for millimeter-wave application. The proposed LNA has four common-source stages. Three transformers are used to connect the drains of the former transistors and the sources of the following transistors to boost the transconductances of the following transistors. Thus, the gain of the circuit is effectively increased. In addition, the noise figure (NF) is decreased because the noise contributions of the following stages are further suppressed by the application of the transformers. To enhance the gain bandwidth, the gate inductor in each inter-stage matching network is independently adjusted to separate the main poles of the four stages. The LNA is demonstrated using a commercial 65-nm CMOS process. According to the measurement results, a maximum gain of 17.7 GHz at 67 GHz and a 3-dB gain bandwidth of 35.6 GHz are achieved. The measured NF is 5.4-7.4 dB at 54-67 GHz. The tested input 1-dB gain compression point (IP1dB) ranges from -15.4 to -11.7 dBm in the entire 3-dB gain bandwidth. With 1-V power supply, the LNA consumes 19-mA dc current. The chip size is only 0.37 mm
²
with all pads.