Low-Leakage ESD Power Clamp Design With Adjustable Triggering Voltage for Nanoscale Applications

A low-leakage electrostatic discharge power clamp with adjustable triggering voltage (V
_t1
) is proposed in this paper. By enabling the static detection path using the transient one, the proposed clamp achieves a wide range of adjustable V
_t1
while maintaining low standby leakage current (I
_leak
), which overcomes the flaw of traditional static clamps. Besides, the adjustable V
_t1
with low I
_leak
is attractive for nanoscale applications. Moreover, the proposed clamp achieves enhanced false-triggering immunity over traditional transient clamps. The proposed clamp is successfully verified in a 65-nm CMOS process. Aside from silicon verifications, detailed comparisons with prior arts and practical application concerns are also addressed in this paper.