Warpage Characterization of Glass Interposer Package Development

The Glass interposer is proposed as a superior alternative to organic and silicon-based interposers for 3D IC (Integrated Circuit) packaging and 2.5D TSV (Through Silicon Vias) package in the near future. The several attractive advantages such as excellent electrical isolation, better RF performance, better feasibility with CTE, could be fabricated with large size. However, the thin glass is extremely brittle and new material for packaging assembly process understanding are some of new challenges need to study, so how to select suitable material properties of glass substrate/interposer and epoxy molding compound (EMC), then investigate the warpage phenomenon is the key topic. In this work, a three-dimensional computational 8-inch glass wafer simulation model was developed for analyzing warpage behavior during assembly process. Besides, advanced metrology analyzer (aMA) based on three-dimensional digital image correlation technology, a non-contact optical displacement measurement scheme, was used to measure 8" glass wafer with molding compound out of plan warpage behavior with different temperatures. The warpage from the simulation were verified against the experimental data. The result predicted by finite-element model (FEM) indicated that reduce thermal expansion mismatch between glass substrate and EMC for warpage control improvement. Besides, low modulus EMC also decreases warpage due to lower structure flexural rigidity. However, the modulus of glass substrate had no obvious effect when the modulus changes from 69GPa to 75GPa. Addition thin glass substrate would be increasing warpage. This work provides design guidance for glass interposer application.