Advances in Thin Wafer Debonding and Ultrathin 28-nm FinFET Substrate Transfer

Over the past few years, temporary bonding has expanded together with the development of 3D stacked IC (SIC) technology. As maturity of the various processes has constantly improved, process yield and process impact on device performance have become key questions to answer. To further answer the refraining elements preventing a more massive technology adoption, in-line testing of the device throughout the overall thinning process has become a real challenge. For this reason, reaccessing the original wafer frontside after the wafer has been thinned now needs to be addressed. Hence this contribution is dealing with the transfer of thin substrate between various temporary carrier substrates. Over the past few years, temporary bonding has expanded together with the development of 3D stacked IC (SIC) technology. As maturity of the various processes has constantly improved, process yield and process impact on device performance have become key questions to answer. To further answer the refraining elements preventing a more massive technology adoption, in-line testing of the device throughout the overall thinning process has become a real challenge. For this reason, reaccessing the original wafer frontside after the wafer has been thinned now needs to be addressed. Hence this contribution is dealing with the transfer of thin substrate between various temporary carrier substrates.