Ultra-low power frequency synthesizer based on a dual-locking ring oscillator

An ultra-low power frequency synthesizer based on a 28-nm CMOS dual-voltage controlled ring oscillator is presented. The technological dispersion and temperature effects are tackled thanks to a Delay locked loop (DLL) which sets a coarse tuning voltage. A back-gate fine tuning voltage is used to lock the oscillating signal on a pure reference with a Phase locked loop (PLL). The close-in intrinsically-poor phase noise of the ring oscillator is cleaned up by the PLL. The overall system consumes less than 100μW to generate a 2.5GHz signal.