Silicon GAA NW TFET inverters with suppressed ambipolarity

In this work, we present our experimental results on Si GAA NW TFET inverters. The ambipolarity of both n- and p-TFETs was successfully suppressed by employing a drain spacer to create an intrinsic Si region between the drain and the gate, the so-called drain-gate underlap. The complementary TFET inverters show a steep transition between high/low states. Compared with the ambipolar TFET inverter, inverters based on suppressed ambipolarity TFETs show large improvement with no output voltage degradation, higher gain and large noise margin.