The implementation of CRC-16 based on a novel FPGA: A collection of reconfiguration operations(ReOps)

This paper presents the implementation of CRC-16 on a novel FPGA, a collection of reconfigurable operators (ReOps), which has smaller configuration bits-stream and better performance than traditional FPGA. A ReOp is a basic block which can process multiple bits data with a specific function set. Considering the complete function set of ReOps, we divide ReOps into eight groups: Arithmetic ReOps, Multiplier ReOps, Bit-wise logic ReOps, Shift ReOps, Multiplexer ReOps, Memory ReOps, Register ReOps, Multiplexer ReOps, Control ReOps. The function collection of ReOps is soundness for the arbitrary ASIC(Application Special Integrated Circuit). We implement the CRC-16 on this novel FPGA, the experimental results show that compared with the traditional FPGA, this novel FPGA has advantages in delay and configuration bits-stream.