Design of fractional-N frequency synthesizer for FSK transceiver

In this Paper, a fractional-N frequency synthesizer fabricated in a 0.18μm process is designed for a FSK transceiver. The precision of the charge pump can be improved by exploiting the op amplifier. Based on capacitance multiplication technique, the area of loop filter is reduced. The fractional-N divider function is realized by the sigma delta modulator. FIR filter is designed in the input stage of sigma-delta modulator to avoid spectrum aliasing. The data of sigma delta modulator can be stably transmitted to programmable frequency divider without meta-stability. The minimum step of frequency is 28Hz with 30MHz reference clock. The measurement results show that the phase noise is -129.69dBc/Hz @1-MHz offset with centered frequency at 390MHz.