Estimation of leakage power using low-power cut technology

Low-power design becomes a challenge for test. In this paper, we propose a novel low-power scan architecture-PowerCut to minimize power consumption during scan test, which is based on a scan chain modification technique. On one hand, a blocking logic is inserted into the scan chain to reduce the dynamic power and a controlling unit is also inserted to decrease the leakage power during the shift cycle. On the other hand, using genetic algorithm, the right values of control signals are found out to control the process. Experiments results indicate that this architecture can effectually reduce power during scan test, and leads to a small increase in area.