Back Enhanced (BE) SOI MOSFET under non-conventional bias conditions

The aim of this work is to investigate the working principle of the new Back Enhanced (BE) SOI MOSFET, under non-conventional bias conditions. This planar BE SOI device with undoped source/drain/channel structure presents the advantage to have very simple fabrication process (without any implantation and electron beam lithography) and can act like a p- or n-type MOS, depending on the back-gate bias condition. Under non-conventional bias condition, many electrical parameters present different behavior. The threshold voltage increases linearly with the drain to source voltage (V
_DS
) if V
_DS
> 0 and it is constant if V
_DS
<;0 in case of p-type BE SOI MOSFET and, analogously, the threshold voltage increases linearly with V
_DS
if it is negative and it is constant if V
_DS
>0 in case of a n-type BE SOI MOSFET. This fact is explained through experimental and simulated data.