FPGA implementation of a wideband Gaussian random number generator with low resource utilization

This work presents a low-complexity hardware implementation of highly accurate wide-band Gaussian noise generator based on the Ziggurat method. Different from the previous works in the literature, the Ziggurat Algorithm is modified such that the computations are done over only three equal regions, yielding important savings in the resource utilization. For the verification of the design, Chi-square Goodness-of-Fit, Anderson Darling, and Kolmogorov-Smirnov tests have been applied together with the bit error rate (BER) measurements on the ZedBoard XC7Z020. Regarding the resource utilization, bandwidth and accuracy requirements, several architectures and their implementation results are presented. Implementation in Xilinx Zynq 7045-3 SoC device resulted in 205 Slices, 14 DSPs and 1-BRAM as for the lowest resource utilization, and 330MHz as for the highest signal bandwidth.