Evaluation of interconnects based on electromigration criteria and circuit performance

Traditional methods to identify critical interconnects regarding electromigration are based on current density criteria. As these can be too conservative and lead to a design with oversized interconnects, it can be a problem in designs with area restriction. To guarantee a more accurate design, the chip designer needs to consider besides the critical current density the performance variation. In this work, a method to investigate and identify oversized lines is proposed. The method is applied to evaluate a bandgap circuit. Although the designed interconnects obey the foundries' limits, the results indicate that they can be reduced without affecting neither the circuit performance nor reliability.