A self control strategy for a delta inverter fed BDCM drive using Xilinx system generator with fixed point/floating point mode

This paper develops the self control strategy of the Brushless DC Motor (BDCM) fed by the reduced Three Switch Three Phase Inverter (TSTPI) using the Xilinx Kintex 7 Field Programmable Gate Arrays (FPGA) package. This proposed command begins with a test simulation on the numerical environment Matlab using in the first step the Simulink toolbox and in the second step the Xilinx System Generator (XSG) one. A comparative study of the self control simulation results is exposed between the model developed in Matlab Simulink, with the one treated by the Matlab\(XSG) considering the two cases: fixed point and floating point precision. After checking the difference between simulation results using the XSG floating point and the XSG fixed point of the same control strategy design, a VHDL code is easily and automatically generated. A report which characterized the XSG architecture designs for both precisions is exploited and discussed. In this work, the self control strategy design has used as latency 0.68μs during an execution frequency equal to 0.2 MHz in 68clock cycles with 100 MHz maximum FPGA clock frequency. With these parameters, it is demonstrated that the FPGA implementation of the self control strategy using the floating point precision can yet reach a better performance at high sampling frequency.