Comparative analysis of the HEVC decoder on two embedded processors using NEON technology

This work presents a comparison of two implementations of the last software version of The High Efficiency Video Coding (HEVC) decoder in a single low cost processor ARM Cortex-A series using NEON architecture which is a Single Input Multiple Data (SIMD). By using this technology of optimization, the whole execution time is reduced up to x4. We have analyzed separately all the blocks in the decoder and determined the consumed time percentage of each one compared to the whole time. This allows us to detect the more time consuming blocks. Then, we can find an optimal way to accelerate their functioning.